PCB design for 128 GS/s ADC-Based SerDes Rx
6-layer with Megtron6 dielectric + blind via on L1-L2 and L5-L6
RTL for 128 GS/s ADC-Based SerDes Rx
RTL used for the digital backend implementation of the 128 GS/s ADC-based SerDes Rx
6-layer with Megtron6 dielectric + blind via on L1-L2 and L5-L6
RTL used for the digital backend implementation of the 128 GS/s ADC-based SerDes Rx